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	<id>https://mps.wiki.triumf.ca/w/index.php?action=history&amp;feed=atom&amp;title=MPS_Minutes_20210520</id>
	<title>MPS Minutes 20210520 - Revision history</title>
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	<updated>2026-05-07T01:03:16Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
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	<entry>
		<id>https://mps.wiki.triumf.ca/w/index.php?title=MPS_Minutes_20210520&amp;diff=54&amp;oldid=prev</id>
		<title>Lennarz: Created page with &quot;Present: MA, HH, KL, MR, RN, RC, AD, AL (recorder)  = Second stage trip = *HH fixed issue with dumping the data *Question regarding the following scenario: If we are running n...&quot;</title>
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		<updated>2021-05-25T17:23:59Z</updated>

		<summary type="html">&lt;p&gt;Created page with &amp;quot;Present: MA, HH, KL, MR, RN, RC, AD, AL (recorder)  = Second stage trip = *HH fixed issue with dumping the data *Question regarding the following scenario: If we are running n...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;Present: MA, HH, KL, MR, RN, RC, AD, AL (recorder)&lt;br /&gt;
&lt;br /&gt;
= Second stage trip =&lt;br /&gt;
*HH fixed issue with dumping the data&lt;br /&gt;
*Question regarding the following scenario: If we are running normally and someone hits the stop button for analysis. When the trip happens, the stop is bypassed. -&amp;gt; We should clear when jumping to stage 2.&lt;br /&gt;
*Logistics: Do we scan the status register all the time? This would be required to not get out of synch.&lt;br /&gt;
*RN: This is Intractable 2 masters problem as bit can be set by EPICS or firmware.&lt;br /&gt;
*EPICS should reset bit as soon as status change is detected?&lt;br /&gt;
*MR: We should be constantly scanning already.&lt;br /&gt;
&lt;br /&gt;
*Second failure scenario for which response needs clarification: If we get a trip condition and everything is connected, however, the FSD or timing system does not send a trip? What if external trip signal is not send?&lt;br /&gt;
*Then we would not go to stage 2 and we do not trip HV&lt;br /&gt;
*MR: This scenario could happen if the cable between FSD breakout board going into event receiver is disconnected or malfunctioning.&lt;br /&gt;
*FSD goes to RF switch AND event receiver.&lt;br /&gt;
*After stage 1 trip we should add a timer (~15us wait should be sufficient), i.e., if no response is received, system should trip.&lt;br /&gt;
&lt;br /&gt;
*These 2 problems are the last issues HH needs to resolve, then upgrade should be finished.&lt;br /&gt;
&lt;br /&gt;
= BLM HV trip (iseg) =&lt;br /&gt;
*Issue with BLM tripping during post-mortem test was never resolved.&lt;br /&gt;
*No repsonse from iseg&lt;br /&gt;
*We can try swapping the boards and see if trip still happens&lt;br /&gt;
*Swap boards and addresses, then re-test&lt;br /&gt;
*HH: Is there dial option on modules?&lt;br /&gt;
*MR/AD: This needs change in IOC shell. HH to confirm.&lt;br /&gt;
*Spare modules available? 12-16 channel modules purchase for ARIEL?&lt;br /&gt;
&lt;br /&gt;
= E-hall work =&lt;br /&gt;
&lt;br /&gt;
*AL, MA finished re-routing high-energy cables and HH shortened and terminated cables on Tuesday, which took about 6hrs. Labels were attached&lt;br /&gt;
*AL to attach new labels on roof. Also for LEDs. AL to send HH list with required labels after meeting.&lt;br /&gt;
*MA, AL to finish Ar connections next Tuesday and get leak detector from Rick.&lt;br /&gt;
&lt;br /&gt;
= Fibre =&lt;br /&gt;
*MA to do baseline tests next week&lt;br /&gt;
&lt;br /&gt;
= LED calibration =&lt;br /&gt;
*AL to write sequence of operation as base for EPICS implementation.&lt;br /&gt;
*Parallel ramp up of all LEDs with PMTs at voltage&lt;br /&gt;
*Compare detector response to reference and set tolerance.&lt;br /&gt;
*Make LED output vs detector response graphs&lt;br /&gt;
&lt;br /&gt;
= AOB =&lt;br /&gt;
*RN: Are there blanking panels on MPS crate? -&amp;gt; Does not seem to be the case. We should get some.&lt;/div&gt;</summary>
		<author><name>Lennarz</name></author>
	</entry>
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