MPS Minutes 20210603: Difference between revisions

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*MR, AD, naming should not cause these issues
*MR, AD, naming should not cause these issues
*Eric from Ops to power cycle crate today and AL to perform more tests, while Ricky and Mike monitor system
*Eric from Ops to power cycle crate today and AL to perform more tests, while Ricky and Mike monitor system
*MR checked digital output. 2 signals to PLC, but no oscillating signal. Just on/off ==> Unlikely to cause trip
*Ricky to follow up with iseq sales person and tech support


==Second stage trip ==
==Second stage trip ==

Revision as of 20:23, 8 June 2021

Present: HH, MR, KL, AD, RC, RN, AL (recorder)

Post Mortem and HV issue

  • AL tested whether trip issues with BLMs and Post Mortem still persist after module address change
  • Turned out the trip still happened even with different detector channel. And this time voltages on all three modules for all biased PMTs tripped and it was not possible to ramp any of the other channels that were biased at the time of the trip up either.
  • How are modules affecting each other?
  • Do crate voltages drop?
  • Address space should be A16. Likely only the iseq modules are in A16 in that crate
  • MR, AD, naming should not cause these issues
  • Eric from Ops to power cycle crate today and AL to perform more tests, while Ricky and Mike monitor system
  • MR checked digital output. 2 signals to PLC, but no oscillating signal. Just on/off ==> Unlikely to cause trip
  • Ricky to follow up with iseq sales person and tech support

Second stage trip

  • HH cannot test whole module together, i.e. but can test interface and 2nd stage trip separately.
  • Confident it works, however, may have to test everything together online
  • Issue is how pulses are generated
  • Pulses have to disappear in 10us, however, pulses are 100ms.
  • Ricky ran into the same problem
  • HH to do more adjustments on code.
  • Ricky finished half of the update this week. Updated register bits reading to the data base
  • Need to finish the rest and then verify changes and see if EPICS reads bits correctly
  • HH tried other ways to generate single pulse with pulser, but pulser leakage current is too high, so it trips
  • Trying to find low leakage FET
  • Pulser takes external trigger. Triggers on waveform one selects or some arbitrary one that is programmed in
  • Square wave generates 10000 pulses, trying to get it down to 1.
  • May have to specify points on how the waveform looks like

Fibre work

AOB

  • Need two additional labels for ELBT:PMT1C:LED and ELBT:PMT1B:LED