MPSMinutes 20210520: Difference between revisions
		
		
		
		
		
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*AL to write sequence of operation as base for EPICS implementation.  | *AL to write sequence of operation as base for EPICS implementation.  | ||
*Parallel ramp up of all LEDs with PMTs at voltage  | *Parallel ramp up of all LEDs with PMTs at voltage  | ||
*Compare detector response to reference and set tolerance.  | |||
*Make LED output vs detector response graphs  | |||
= AOB =  | = AOB =  | ||
*RN: Are there blanking panels on MPS crate? -> Does not seem to be the case. We should get some.  | *RN: Are there blanking panels on MPS crate? -> Does not seem to be the case. We should get some.  | ||
Revision as of 17:22, 25 May 2021
Present: MA, HH, KL, MR, RN, RC, AD, AL (recorder)
Second stage trip
- HH fixed issue with dumping the data
 - Question regarding the following scenario: If we are running normally and someone hits the stop button for analysis. When the trip happens, the stop is bypassed. -> We should clear when jumping to stage 2.
 - Logistics: Do we scan the status register all the time? This would be required to not get out of synch.
 - RN: This is Intractable 2 masters problem as bit can be set by EPICS or firmware.
 - EPICS should reset bit as soon as status change is detected?
 - MR: We should be constantly scanning already.
 
- Second failure scenario for which response needs clarification: If we get a trip condition and everything is connected, however, the FSD or timing system does not send a trip? What if external trip signal is not send?
 - Then we would not go to stage 2 and we do not trip HV
 - MR: This scenario could happen if the cable between FSD breakout board going into event receiver is disconnected or malfunctioning.
 - FSD goes to RF switch AND event receiver.
 - After stage 1 trip we should add a timer (~15us wait should be sufficient), i.e., if no response is received, system should trip.
 
- These 2 problems are the last issues HH needs to resolve, then upgrade should be finished.
 
BLM HV trip (iseg)
- Issue with BLM tripping during post-mortem test was never resolved.
 - No repsonse from iseg
 - We can try swapping the boards and see if trip still happens
 - Swap boards and addresses, then re-test
 - HH: Is there dial option on modules?
 - MR/AD: This needs change in IOC shell. HH to confirm.
 - Spare modules available? 12-16 channel modules purchase for ARIEL?
 
Ehall work
- AL, MA finished re-routing high-energy cables and HH shortened and terminated cables on Tuesday, which took about 6hrs. Labels were attached
 - AL to attach new labels on roof. Also for LEDs. AL to send HH list with required labels after meeting.
 - MA, AL to finish Ar connections next Tuesday and get leak detector from Rick.
 
Fibre
- MA to do baseline tests next week
 
LED calibration
- AL to write sequence of operation as base for EPICS implementation.
 - Parallel ramp up of all LEDs with PMTs at voltage
 - Compare detector response to reference and set tolerance.
 - Make LED output vs detector response graphs
 
AOB
- RN: Are there blanking panels on MPS crate? -> Does not seem to be the case. We should get some.